MST application method

MST Integrated into Devices

Quantum-engineered epitaxial silicon, grown selectively or non-selectively, inside or on top of existing device structures.

How it works

Engineered for each device

Each incoming device has to be engineered for MST integration to extract the full value: the film is tuned to the device and to its downstream thermal budget.

Executive summary

Applications

GAA S/D blocking liner

≈5× sharper

Phosphorus edge after 1050 °C; blocks where an equal-thickness SiAs liner does not; +50% SiP dopant activation

Silicon

LV BCD switch

0.25 µm gate

5 V switch shrunk from 0.7 µm with ≈2× drive current

Silicon

LDMOS

8–20% lower Rsp

Same breakdown; MST holds a doped surface layer in the drift

MSTcad™ simulation · In R&D

Logic CMOS

≈9× NBTI lifetime

Better gate oxide and mobility for planar and HKMG CMOS

Silicon

Learn more: whitepapers & publications applications

Work with us

Partner with Atomera

Evaluate MST in your own process and devices with Atomera's engineering team.