Enabling 4F² DRAM Junctionless Vertical Channel Transistors with Novel Oxygen Inserted Si Substrates – A TCAD Study

SISPAD 2026 (Atomera and San José State University) - 2026

Oxygen-inserted silicon in the starting substrate holds the 4F² vertical-channel transistor's doping profile through the DRAM thermal budget: 2.5–3× read/write current within the retention limit, with two epitaxy steps and one wafer bond removed (TCAD).

Electron and Hole Surface Roughness Scattering-Limited Mobilities in Oxygen-Inserted (OI) Si Channel

Journal of Applied Physics (AIP Publishing)

Electron and hole surface-roughness-scattering (SRS) limited mobilities, deconvolved from 4.2 K measurements, were compared between oxygen-inserted (OI) and control Si channels for n- and p-MOSFETs.

Remote Control of Doping Profile, Silicon Interface, and Gate Dielectric Reliability via Oxygen Insertion into Silicon Channel

IEEE IMFEDK (International Meeting for Future of Electron Devices, Kansai) - 2022

Inserting partial monolayers of oxygen into the Si lattice modifies the formation enthalpy of dopants and point defects, enabling remote control of doping profiles away from the inserted film. An ¹⁸O isotope tracer was used to follow the exchange of oxygen.

Source Engineering on Oxygen-Inserted Si Channel for Gate Length Scaling of Low-Voltage Switch Devices

IEEE ISPSD (34th International Symposium on Power Semiconductor Devices and ICs) - 2022

Source engineering for gate-length scaling of low-voltage power switches was demonstrated by shrinking baseline 5 V analog MOSFETs down to 0.25 µm, giving a 100% increase in drive current over baseline devices and a significantly lower specific on-resistance.

RFSOI n-MOSFET OI-Layer Ground-Plane Engineering with Quasi-3D Simulations

SISPAD (International Conference on Simulation of Semiconductor Processes and Devices) - 2021

A quasi-3D simulation technique for partially depleted RFSOI MOSFETs models oxygen-inserted layers that form a p+ ground plane in the SOI by immobilizing boron acceptors within the SOI layer.

Intermixing Reduction in Ultra-Thin Titanium Nitride/Hafnium Oxide Film Stacks Grown on Oxygen-Inserted Silicon and Associated Reduction of the Interface Charge Dipole

Journal of Applied Physics 130, 185303 - 2021

Oxygen-insertion layers in Si reduce intermixing of a 3.0 nm TiN / 3.5 nm HfO₂ film stack, measured by SIMS, x-ray photoelectron spectroscopy and high-resolution microscopy, and reduce the associated interface charge dipole.

Analysis of the Effects of Boron Transient Enhanced Diffusion on Threshold Voltage Mismatch in Steep Retrograde Doping NMOSFETs with Inserted Oxygen Layers

IEEE IPFA - 2020

Co-authored with Atomera's partner Asahi Kasei Microdevices (AKM), San José State University and tei Solutions, with data showing up to 20% high-field mobility enhancement.

Tuning of Schottky Barrier Height Using Oxygen-Inserted (OI) Layers and Fluorine Implantation

AIP Advances, Vol. 10, Issue 6 - 2020

MST applied to Schottky-barrier engineering, co-authored with UC Berkeley and Axcelis. Reducing the Schottky barrier height lowers the contact resistance that limits FinFET on-state current.

Applications of Oxygen Inserted Silicon Devices in Power and RF (invited)

IEEE EDTM (4th Electron Devices Technology & Manufacturing Conference) - 2020

Invited paper with a TCAD co-author from San José State University (formerly at Synopsys), illustrating MST doping-profile engineering with examples from 5 V NMOS power and RF-SOI devices.

Effects of Oxygen-Inserted Layers and Oxide Capping Layer on Dopant Activation for the Formation of Ultrashallow p-n Junctions in Silicon

Journal of Vacuum Science & Technology B 36, 061211 - 2018

The effects of oxygen-inserted layers and a low-temperature oxide capping layer on rapid thermal activation of ultrashallow implanted boron, phosphorus and arsenic in silicon.

Suppressing Oxidation-Enhanced Diffusion of Boron via Buried Epitaxial Oxygen-Inserted Layers in Silicon

IEEE conference publication - 2018

From the Atomera team with a Synopsys co-author: buried epitaxial oxygen-inserted layers almost completely block the oxidation-enhanced diffusion of boron during gate oxidation.

Suppressing Oxidation-Enhanced Diffusion of Boron in Silicon With Oxygen-Inserted Layers

IEEE journal - 2018

The expanded journal version of the 2018 EDTM paper from the Atomera team and a Synopsys co-author: MST can almost completely block the enhanced diffusion of doping profiles during gate oxidation.

Experimental Investigation of N-Channel Oxygen-Inserted (OI) Silicon Channel MOSFETs with High-K/Metal Gate Stack

IEEE conference publication - 2018

Experimental characterization with co-authors from the University of Notre Dame: significant mobility improvement (23%) and gate-leakage reduction (2.7×) with MST for high-k metal gate (HKMG) NMOS devices.

Effects of Oxygen-Inserted Layers on Diffusion of Boron, Phosphorus, and Arsenic in Silicon for Ultra-Shallow Junction Formation

Journal of Applied Physics 123, 125704 - 2018

With co-authors from UC Berkeley and Axcelis: an experimental demonstration of MST for shallow-junction technology. The data and associated simulations indicate that MST is beneficial for achieving shallower junctions.

Punch-Through Stop Doping Profile Control via Interstitial Trapping by Oxygen-Insertion Silicon Channel

IEEE Journal of the Electron Devices Society (J-EDS) - 2017

Invited for a special issue of the IEEE J-EDS on the strength of the EDTM paper of the same title: an expanded version with new material on TCAD modeling.

The Impact of Oxygen Insertion Technology on SRAM Yield Performance

IEEE EDTM - 2017

With co-authors from UT Dallas and elsewhere: simulation of 28 nm planar SRAM with MST, showing significant improvements in SRAM yield and Vmin, expected to be important for ultra-low-power applications.

Punch-Through Stop Doping Profile Control via Interstitial Trapping by Oxygen-Insertion Silicon Channel

IEEE EDTM - 2017

With co-authors from Prof. Suman Datta's group at Penn State University (now University of Notre Dame): experimental engineering and modeling of boron and phosphorus doping profiles with MST.

Comparison of SOI versus Bulk FinFET Technologies for 6T-SRAM Voltage Scaling at the 7-/8-nm Node

IEEE Transactions on Electron Devices, Vol. 64, Issue 1 - 2017

With co-authors from UC Berkeley: MST on bulk versus SOI FinFETs. A bulk MST FinFET provides almost all the benefits of the more challenging SOI implementation at the 7/8 nm node.

Analysis of 7/8-nm Bulk-Si FinFET Technologies for 6T-SRAM Scaling

IEEE Transactions on Electron Devices - 2016

The benefits of a super-steep retrograde (SSR) fin doping profile, achievable with oxygen-insertion technology, are quantified with 3-D TCAD simulations for 7/8 nm bulk-Si FinFET technology.

Electron Mobility Enhancement in (100) Oxygen-Inserted Silicon Channel

Applied Physics Letters 107, 123502 - 2015

The origins of the very large (88%) measured increase in conductance (gm) for oxygen-inserted (MST) nMOS devices, with co-authors from UC Berkeley and industry.

Extension of Planar Bulk n-Channel MOSFET Scaling With Oxygen Insertion Technology

IEEE Transactions on Electron Devices, vol. 61, no. 9 - 2014

With co-authors from UC Berkeley: the wide range of power and performance benefits of MST for extending the scaling of low-power bulk nMOS devices.

Oxygen-Inserted SegFET: A Candidate for 10 nm Node System-on-Chip Applications

IEEE Silicon Nanoelectronics Workshop - 2014

With authors from UC Berkeley: how MST can enhance a new quasi-planar device, the SegFET, with performance competing with the best 10 nm-generation devices for system-on-chip applications.

Effectiveness of Quasi-Confinement Technology for Improving P-Channel Si and Ge MOSFET Performance

IEEE Silicon Nanoelectronics Workshop - 2013

The benefits of MST for silicon and germanium p-type planar and FinFET devices over a wide range of technologies.

Comparative Study of Uniform Versus Supersteep Retrograde MOSFET Channel Doping and Implications for 6T SRAM Yield

IEEE Transactions on Electron Devices, vol. 60, no. 5 - 2013

Joint paper with UC Berkeley simulating the improved yield and reduced minimum operating voltage of MST-enabled 6T SRAM cells, with potentially up to 50% power savings.

MOSFET Performance and Scalability Enhancement by Insertion of Oxygen Layers

IEEE IEDM - 2012

IEDM paper with UC Berkeley introducing and calibrating the model for the MST confinement effect in Synopsys Sentaurus. Mobility enhancement is demonstrated for both nMOS and pMOS devices.

Tunneling Through Superlattices: the Effect of Anisotropy and Kinematic Coupling

Journal of Physics: Condensed Matter, Vol. 24, No. 49 - 2012

The origins of carrier tunneling in various superlattice systems, giving a theoretical background for the reduced gate leakage observed in MST devices.

Simultaneous Carrier Transport Enhancement and Variability Reduction in Si MOSFETs by Insertion of Partial Monolayers of Oxygen

IEEE Silicon Nanoelectronics Workshop - 2012

Simultaneous nMOS and pMOS high-field mobility enhancement and variability reduction by inserting partial monolayers of oxygen during silicon epitaxy of the channel layer.

Silicon Superlattice on SOI for High Mobility and Reduced Leakage

IEEE International SOI Conference - 2007

Joint experimental paper with industry co-authors demonstrating the first MST mobility enhancement and gate-leakage reduction results for an MST-enhanced silicon-on-insulator (SOI) technology.