Application

SOI Substitute

An MST-engineered bulk silicon wafer that holds its dopant layers in place, as an alternative to SOI starting wafers.

Applications

Leading Logic DRAM 3D NAND Analog & Power GaN-on-Si RF-SOI Whitepapers All applications

How MST helps

MST layers grown into a bulk silicon wafer hold its dopant profile through the thermal budget. The doped layer stays where it was put, under undoped silicon.

Learn more: whitepapers & publications

Phosphorus SIMS after implant and 750 °C anneal: control silicon vs MST

Silicon data

Phosphorus held below the MST layer

Same implant (P 220 keV, 8.3×10¹³ cm⁻²) and 750 °C, 1 h anneal, with and without MST.

Phosphorus SIMS: control silicon vs MSTPhosphorus SIMS, as implanted and after 750 °C for 1 h.Control: phosphorus diffuses up to the surface (≈1×10¹⁸ cm⁻³). MST: >10× less near the surface, with phosphorus piled up at the MST layer.

applications Diffusion Blocking

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Partner with Atomera

Evaluate MST in your own process and devices with Atomera's engineering team.